1. Field of the Invention
The present invention generally relates to an electronic device, and especially relates to a thin-film circuit substrate that has through holes, and a manufacturing method thereof and a via formed substrate that has through holes, and a manufacturing method thereof.
A so-called via formed substrate that has a large number of through holes formed is an important component for an interposer type part, a multilayer circuit board, and three-dimensional chip mounting technology.
Various circuit patterns are formed on the via formed substrate. In the interposer type component inserted between a wiring substrate and an LSI chip, a supply voltage fluctuation due to a high-speed operation of the LSI chip can be absorbed by forming a high dielectric capacitor or a ferroelectric capacitor on the substrate.
Further, by installing a via formed substrate such as above on a package substrate with other parts, a system package can be formed, and a multi chip module (MCM) and a system-in-package can be formed by arranging various parts, including an LSI chip, on the via formed substrate.
2. Description of the Related Art
Conventionally, via formed substrates using a ceramic substrate as a base have been marketed. In the via formed substrates available in the market, a number of through holes are formed on the ceramic substrate, each through hole being provided with a via plug of a low resistance metal, such as Cu and W.
FIG. 1(A) and FIG. 1(B) show an example of a plan and a cross section, respectively, of a conventional via formed substrate.
With reference to the plan of FIG. 1(A), a number of via holes 12A are formed in a ceramic substrate 11 that is made of Al2O3 and the like, and each via hole 12A is filled with a via plug 12B that is made of a metal such as Cu and W.
The via formed substrate as shown in FIG. 1(A) and FIG. 1(B) is designed so that it is mainly inserted between a wiring substrate and electronic parts, and a number of electrode pads 13 which are made of nickel etc. are formed corresponding to each via plug 12B as shown in the cross section drawing of FIG. 1(B). By forming a solder vamp on each of the electrode pads 13, the via formed substrate electrically connects the wiring substrate on the bottom side and electronic parts on the top side.
FIG. 2 shows an example of an interposer type thin-film circuit substrate of the related technology, in which a thin-film circuit including a ferroelectric capacitor is formed on the via formed substrate. In the interposer type thin-film circuit substrate in which this ferroelectric capacitor is formed, power supply wiring can be formed directly under an LSI chip in the shortest distance, and an impedance of the power supply wiring is minimized. Consequently, a power supply voltage fluctuation due to a high-speed operation of the LSI chip is suppressed by using the interposer type thin-film circuit substrate.
With reference toy FIG. 2, the electrode pads 13 of the upper surface of the via formed substrate 11 of FIG. 1(B) are removed by polish processing, and a capacitor insulator layer 14 of a material such as a ferroelectric material and a high dielectric material, such as BST and PZT, is formed on the upper surface of the via formed substrate 11. On the capacitor insulator layer 14, a metal layer 15 that functions as a grounding electrode is formed, and a polyimide protective coat 16 is further formed on the metal layer 15.
Contact holes penetrate the metal layer 15, the capacitor insulator layer 14 and the polyimide protective coat 16, exposing an edge of the via plugs 12B, and contact plugs 17A are formed, filling up the contact holes. Further, electrode pads 17B are formed on the polyimide protective coat 16, contacting a tip of the contact plugs 17A.
Vamp electrodes 18, such as solder balls, are formed on the electrode pads 17B. On the undersurface of the via formed substrate 11, vamp electrodes 19, such as solder balls, are formed under the electrode pads 13.
As regards parts including a capacitor insulator layer of a material such as a ferroelectric material and high dielectric material, heat treatment in an oxidization atmosphere at a temperature of at least 700 degrees C. is necessary. Since the via plugs 12B in the via holes 12A are made of a metal such as Cu and W which are easy to oxidize, the via plugs 12B expand as a result of oxidization, causing destruction of the thin film circuit formed on the surface of the ceramic substrate 11. In addition, control of contraction accompanying sintering when producing ceramic substrates is difficult, making it difficult to mount an LSI with large integration density on a via substrate using the ceramic substrate.
On the other hand, it is conceivable that an Si substrate is used as a via formed substrate, and minute via holes are arranged in a fine pitch on the Si substrate by a semiconductor process. Especially, by using a dry etching process, it is possible to form a large number of minute via holes simultaneously, having an extraordinarily large aspect ratio, in a fine pitch into the Si substrate.
In the dry etching process, however, an etching rate generally tends to vary, causing via holes to form with different depths when forming a large number of deep via holes, the variance being around xc2x15%. Consequently, when the dry etching process for a predetermined period is finished, some via holes may not have completely penetrated the Si substrate.
In this concern, when forming deep via holes in an Si substrate by dry etching, it is necessary to polish the back surface of the substrate after the dry etching process such that all the via holes surely have opening. Moreover, a needle-like structure is easy to be formed in a via hole bottom when forming a deep via hole in an Si substrate by dry etching. It is, therefore, considered indispensable to polish the back surface of the substrate as described above. The polishing process increases production costs of a via formed substrate.
Further, in the case of the via formed substrate based on the Si substrate, further polishing process is necessary in order to remove a surplus metal layer after filling up the via holes with a low resistance metal, such as Cu and W, and the polishing of the substrate surface has to be to a mirror finish so that a thin film circuit can be formed. Such mirror polishing further increases the production cost of the via formed substrate. Moreover, a process for forming an insulator layer on the mirror-polished surface of the via formed substrate is necessary prior to forming a thin-film circuit.
Further, in the via formed substrate based on the Si substrate, which is formed in this manner, when a thin-film circuit including a capacitor, such as a ferroelectric capacitor and a high dielectric capacitor, is formed on a via formed substrate, the via plugs in the via holes oxidize through the heat treatment in an oxidization atmosphere, causing the destruction or damage of the thin-film circuit, similar to the case of the via formed substrate of the conventional ceramic substrate. Moreover, the heat treatment for forming the thin-film circuit including the ferroelectric or the high dielectric capacitor can cause the via plugs to shrink.
Accordingly, it is desired that a thin-film circuit substrate, solving the problems as above be offered, which is based on the via formed substrate in which the via holes are formed in the Si substrate.
With an advancement in the integration density of LSI, and an enhancement of functions, need for decreasing the pitch of via holes in a substrate for mounting LSI, such as an MCM substrate using a via formed substrate, is rising.
Since via holes have been formed by machining, there is a limit to reduction in the pitch of the via formed substrate of the conventional technology, such as a ceramic substrate and a resin substrate. The limit can be eliminated by using an Si substrate as a via formed substrate, and by forming the via holes through a semiconductor process, as previously explained.
When a via substrate that has highly minute via holes is realized, a new problem arises. That is, when parts, such as LSI, are mounted on the solder balls on the via substrate, a large amount of stress is likely applied to the minute solder balls at the time of mounting the parts and in subsequent use of an electronic system, causing problems, such as breakage of a junction. Another problem to solve is that when forming the via holes in the Si substrate by a semiconductor process, such as dry etching, prolonged etching will be needed, and the production costs of a via formed substrate will increase.
Accordingly, it is a general object of the present invention to provide a novel and useful thin-film circuit substrate and a production method thereof, and an electronic system employing the thin-film circuit substrate.
It is another and more specific object of the present invention to provide a thin-film circuit substrate and a production method thereof that simplifies a production process to obtain a via formed substrate using a semiconductor base plate with an enhanced reliability.
Another object of the present invention is to provide a via formed substrate using a semiconductor substrate, wherein stress applied to vamp electrodes is minimized, and a manufacturing method thereof, which enables an efficient manufacturing thereof even when the diameter of via holes and the pitch of the via holes are decreased.
Other objects and further features of the present invention will become apparent from the following detailed description when read in conjunction with the accompanying drawings.
The present invention solves the above problems by providing a thin-film circuit substrate and a manufacturing method thereof, as follows. The thin-film circuit substrate includes a semiconductor substrate that has a first principal plane and a second principal plane that counters the first principal plane, a first insulation film formed on the first principal plane, and through holes that extend continuously from the second principal plane to the first principal plane, completely through the semiconductor substrate, the through holes including a main section starting from the second principal plane and a tapered section formed near the first principal plane. The manufacturing method includes a step of forming an etching stop film on the first principal plane of the semiconductor substrate that is formed by the first and the second principal planes, a step of forming a resist pattern which has resist openings on the second principal plane of the semiconductor substrate, a step of dry etching the semiconductor substrate using the resist pattern as a mask such that through holes are provided corresponding to the resist openings to the semiconductor substrate and such that the etching stop film is exposed at the through holes, a step of forming an insulator film on the side wall face of the through holes, and a step of removing the etching stop film at the through holes such that openings are formed, exposing the thin-film circuit.
According to the present invention, a thin-film circuit is formed before formation of via plugs on the semiconductor substrate surface that is mirror-finished beforehand, dispensing with a mirror polish process after the formation of the via plugs, which was needed conventionally, and simplifying the manufacturing process of the thin-film circuit substrate. That is, according to the present invention, the thin-film circuit is formed before the via plug formation process. Therefore, oxidization and inflation/contraction of the via plugs, which are due to a heat treatment in an oxidization atmosphere for making a ferroelectric film and a high dielectric film, are avoided, contributing to a high manufacturing yield of a thin-film circuit substrate. Further, by using semiconductor substrates, such as Si substrates, and forming through holes by a dry etching process, a via diameter can easily be made minute, and a fine via pitch can be obtained.
The present invention employs an over-etching for making the through holes by the dry etching method such that all the through holes of the substrate surely penetrate. Here, the over-etching has a tendency to cause the bottom part of the through holes to expand sideways. In order to suppress the sideways expansion of the through holes, the present invention provides an oxide film such that the through holes are surrounded on the substrate bottom. With this structure, when the dry etching process for forming the through holes is stopped by the etching stop film at the bottom of the substrate, advance of the dry etching process to the side is prevented by the oxide film. In this manner, expansion of the through hole bottoms is suppressed, enabling the formation of minute through holes repeatedly at a fine pitch.
Further, the present invention solves the above problems by providing a via formed substrate, and a forming method thereof, as follows. The via formed substrate includes a supporting substrate having a first principal plane and a second principal plane that counters the first principal plane, through holes in a first diameter extending from the second principal plane toward the first principal plane of the supporting substrate, tapered sections formed to the through holes at an end section toward the first principal plane with openings of a second diameter that is larger than the first diameter at the first principal plane, conductive plugs that fill up the through holes, and electrode pads that are formed on the tapered sections and are electrically connected to the conductive plugs in a tapered shape corresponding to the tapered sections. The forming method of the via formed substrate described above includes a step of forming tapered concavities on the first principal plane of the semiconductor substrate by anisotropic etching, a step of forming an insulation layer in a shape corresponding to the tapered concavities and covering the surface of the tapered concavities, a step of forming the via holes that extend from the second principal plane that counters the first principal plane to the first principal plane such that the via holes expose the insulation layer at the tapered concavity section, a step of forming the electrode pads on the insulation layer in a shape corresponding to the top shape of the tapered section such that the tapered sections are surrounded, and a step of forming the via plugs by filling up the via holes with conductive materials.
According to the present invention, by forming the tapered section at the via hole end of the via substrate, a minute via hole can accommodate a solder ball, or a vamp electrode, of a relatively large diameter. Consequently, when parts, such as an LSI chip, are mounted on this via substrate, stress applied to the vamp electrode is eased. The present invention is particularly effective for forming highly minute via holes at a very fine pitch to a via formed semiconductor substrate, such as a Si substrate. The tapered section in the semiconductor substrate surface can be formed beforehand by anisotropic etching, such as wet etching. By preparing the tapered section beforehand, the dry etching process for forming through holes can be shortened, and the manufacturing efficiency of the via formed substrates can be raised.